Design of a 50 GBd linear TIA in a 16 nm FinFET technology

  • With the development towards autonomous driving vehicles increasing data traffic within the vehicle has to be considered.

    New generations of automotive ethernet offering larger bandwidths need to be developed. Optical interconnects with PAM-4 modulation schemes are promising candidates. The thesis focuses on a part of the needed E/O circuits within the automotive application.

    Tasks:

    • - Research optical receiver architectures in advanced CMOS technologies
    • - Schematic and layout design of a 50 GBd linear TIA in a 16 nm FinFET technology
    • - Address special requirements for the automotive application (e.g. temperature range)
    • - Post-Layout simulations and evaluation

     

    Requirements:

    Good understanding of circuits (e.g. ES, RFE or RFICS)

     

    Language: German or English

     

    Additional info:

    This thesis will be in cooperation with the company Knowledge Development for POF (KDPOF), a technology leader company in the field of high-speed optical communications for the automotive in Madrid, Spain. The student will have the opportunity to do a small stay in the KDPOF headquarters.