Mixed-Signal IC Design
- Typ: Vorlesung (V)
- Lehrstuhl: KIT-Fakultäten - KIT-Fakultät für Elektrotechnik und Informationstechnik
- Semester: SS 2026
-
Ort:
Geb. 30.10 NTI-HS
-
Zeit:
Mi 22.04.2026
15:45 - 17:15, wöchentlich
-
Dozent:
Prof. Ahmet Cagri Ulusoy
- SWS: 2
- ECTS: 3
- LVNr.: 2308443
-
Prüfung:
mündlich

Description:
To interact with the physical (analog) world, modern digital computing systems require mixed-signal circuits. By applying the Nyquist sampling theorem and quantization, digital representations of analog signals enable digital processing and storage of signals. To this end, Systems-on-Chip (SoCs) in electronic devices always include mixed-signal circuitry to translate between the analog and digital domains.
This course covers the fundamentals of mixed-signal integrated circuits and translates the theory to practical circuit design. It is intended for students interested in the domain crossing between analog and digital, which enables many of the achievements and products supported by modern electronics.
Parts of this lecture are held in an inverted classroom format.
The course complements the following lectures:
M-ETIT-107364 Analog Circuit Design
M-ETIT-107365 Digital Circuit Design
M-ETIT-106921 Modern VLSI Technologies
M-ETIT-100449 Hardware Modeling and Simulation
M-ETIT-106963 Hardware Synthesis and Optimization
Contents:
Theory and advanced concepts of AD/DA conversion
Sample-and-hold and track-and-hold circuits
Comparators
AD and DA converters
Phase locked loop (PLL), DLL (Delay lock loop) circuits and clock distribution
Learning Goals:
Students who have attended this lecture will gain a deep understanding of the theory of AD/DA conversion and it's issues in practical implementations. By learning how the core elements of sample-and-hold, track-and-hold and comparator circuits work, attendees have the foundational knowledge to design AD/DA converters. In an inverted-classroom format, the students learn about AD/DA converter topologies and their respective design specifics. Finally, the topics of clock recovery and distribution will be treated, since they are critical to fast and accurate mixed-signal circuits.
Sommersemester: 2 SWS
Leistungspunkte: 3
Sprache: Englisch
Erfolgskontrolle(n): The success criteria will be determined by an oral examination (approx. 20-30 min.)
Modulnote: The module grade is the grade of the oral examination.
Voraussetzungen: None